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Authors:Christian Köllner: FZI Forschungszentrum Informatik, Karlsruhe, Germany
Torsten Blochwitz: ITI GmbH, Dresden, Germany
Thomas Hodrius: SET GmbH, Wangen/Allgäu, Germany
Publication title:Translating Modelica to HDL: An Automated Design Flow for FPGA-based Real-Time Hardware-in-the-Loop Simulations
Conference:Proceedings of the 9th International MODELICA Conference; September 3-5; 2012; Munich; Germany
Publication type: Abstract and Fulltext
Issue:076
Article No.:037
Abstract:Advances in the development of electric vehicles challenge existing test methodologies and tools. In particular; hardware-in-the-loop test rigs to verify electric motor controllers require real-time drivetrain emulation with response times in the order of one microsecond. Field-programmable gate arrays can fulfill these requirements due to their high parallelism and the possibility to realize efficient and predictable I/O interfaces. We present an integrated methodology which translates Modelica models to VHDL hardware designs. Our methodology combines well-engineered algorithms from Modelica compilation and high-level synthesis for hardware. We demonstrate its capabilities using the example of a DC motor which was synthesized and implemented on a Xilinx Virtex-5 device.
Language:English
Keywords:Modelica; FPGA; High-level synthesis; VHDL; Hardware-in-the-Loop; Real-time
Year:2012
No. of pages:10
Pages:355-364
ISBN:978-91-7519-826-2
Series:Linköping Electronic Conference Proceedings
ISSN (print):1650-3686
ISSN (online):1650-3740
File:http://www.ep.liu.se/ecp/076/037/ecp12076037.pdf
Available:2012-11-19
Publisher:Linköping University Electronic Press; Linköpings universitet

REFERENCE TO THIS PAGE
Christian Köllner, Torsten Blochwitz, Thomas Hodrius (2012). Translating Modelica to HDL: An Automated Design Flow for FPGA-based Real-Time Hardware-in-the-Loop Simulations, Proceedings of the 9th International MODELICA Conference; September 3-5; 2012; Munich; Germany http://dx.doi.org/10.3384/ecp12076355 (accessed 10/31/2014)