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Authors:Janusz Rudnicki: Instytut Radioelektroniki Politechniki Warszawskiej, Poland
J. Piotr Starski: Chalmers University of Technology, Microwave Electronics, Sweden
Publication title:FDTD analysis of multichip vertical interconnects
Conference:GigaHertz 2003. Proceedings from the Seventh Symposium
Publication type: Poster
Issue:008
Article No.:077
Abstract:In this paper we present FDTD simulations for multichip interconnects between a CPW transmission line, CPW transmission line and a CPW chip (CPW-CPW-CPW) using metallic, spherical bumps. We show that the main influence on the performance of the entire CPW-CPW-CPW structure has the first level of interconnection, where the via holes are used. A reduction in return loss can be achieved by using small bump dimensions in the lower CPW-CPW interconnection.
Language:English
Year:2003
No. of pages:4
Series:Linköping Electronic Conference Proceedings
ISSN (print):1650-3686
ISSN (online):1650-3740
File:http://www.ep.liu.se/ecp/008/posters/051/ecp00851p.pdf
Available:2003-11-06
Publisher:Linköping University Electronic Press, Linköpings universitet

REFERENCE TO THIS PAGE
Janusz Rudnicki, J. Piotr Starski (2003). FDTD analysis of multichip vertical interconnects, GigaHertz 2003. Proceedings from the Seventh Symposium http://www.ep.liu.se/ecp_article/index.en.aspx?issue=008;article=077 (accessed 9/22/2014)