Article | Proceedings of The 9th EUROSIM Congress on Modelling and Simulation, EUROSIM 2016, The 57th SIMS Conference on Simulation and Modelling SIMS 2016 | Validation Method for Hardware-in-the-Loop Simulation Models Linköping University Electronic Press Conference Proceedings
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Title:
Validation Method for Hardware-in-the-Loop Simulation Models
Author:
Tamás Kökényesi: Department of Automation and Applied Informatics, Budapest University of Technology and Economics, Hungary István Varjasi: Department of Automation and Applied Informatics, Budapest University of Technology and Economics, Hungary
DOI:
10.3384/ecp17142749
Download:
Full text (pdf)
Year:
2018
Conference:
Proceedings of The 9th EUROSIM Congress on Modelling and Simulation, EUROSIM 2016, The 57th SIMS Conference on Simulation and Modelling SIMS 2016
Issue:
142
Article no.:
109
Pages:
749-754
No. of pages:
6
Publication type:
Abstract and Fulltext
Published:
2018-12-19
ISBN:
978-91-7685-399-3
Series:
Linköping Electronic Conference Proceedings
ISSN (print):
1650-3686
ISSN (online):
1650-3740
Publisher:
Linköping University Electronic Press, Linköpings universitet


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The advances in FPGA technology have enabled fast real-time simulation of power converters, filters and loads. HIL (Hardware-in-the-Loop) simulators taking advantage of this technology have revolutionized control hardware and software development for power electronics. Switching frequencies in today’s power converters are getting higher and higher, so reducing calculation time steps in HIL simulators is critical, especially if simulating lower power circuits. Faster calculation can be achieved with simpler models or lower resolution. Both possibilities require the validation of the FPGA-synthesizable simulation models to check whether they are correct representations of the simulated main circuit or not. The subject of this paper is a validation method, which treats the simulation error similar as production variance, which can be measured between different instances of the original main circuit.

Keywords: circuit simulation, power circuit modeling, signal resolution, discrete-time systems

Proceedings of The 9th EUROSIM Congress on Modelling and Simulation, EUROSIM 2016, The 57th SIMS Conference on Simulation and Modelling SIMS 2016

Author:
Tamás Kökényesi, István Varjasi
Title:
Validation Method for Hardware-in-the-Loop Simulation Models
DOI:
http://dx.doi.org/10.3384/ecp17142749
References:
No references available

Proceedings of The 9th EUROSIM Congress on Modelling and Simulation, EUROSIM 2016, The 57th SIMS Conference on Simulation and Modelling SIMS 2016

Author:
Tamás Kökényesi, István Varjasi
Title:
Validation Method for Hardware-in-the-Loop Simulation Models
DOI:
https://doi.org10.3384/ecp17142749
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Last updated: 2019-10-02