Article | GigaHertz 2003. Proceedings from the Seventh Symposium | On-chip tuning of RF active filters

Title:
On-chip tuning of RF active filters
Author:
Win Chaivipas: Royal Institute of Technology, Sweden Magnus Danestig: Acreo AB, Sweden Mohammed Ismail: Royal Institute of Technology, Sweden \ Spirea AB, Sweden Henrik Johansson: Acreo AB, Sweden Laurent Billonnet: IRCOM, UMR, France
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Year:
2003
Conference:
GigaHertz 2003. Proceedings from the Seventh Symposium
Issue:
008
Article no.:
029
No. of pages:
4
Publication type:
Poster
Published:
2003-11-06
Series:
Linköping Electronic Conference Proceedings
ISSN (print):
1650-3686
ISSN (online):
1650-3740
Publisher:
Linköping University Electronic Press; Linköpings universitet


A thorough study of a master-slave tuning of an active RF filter is presented. The control technique is based on the Voltage-Controlled Filter based Phase Locked-Loop (VCF-PLL) approach. A phase domain simulation model was developed to model the RF filter and it’s control circuitry; to enable fast; and relatively accurate simulation of the phase locked loop. A linear model of the complete VCF-PLL was developed for the purpose of manual analysis; and to get a better understanding of the relationship between the VCF-PLL loop-gain and loop settling accuracy. With the aid of the phase domain simulation model a silicon implementation of the VCF-PLL in 0.18 um CMOS was made. Finally; the paper ends with the conclusion and analysis of the PLL tuning error.

GigaHertz 2003. Proceedings from the Seventh Symposium

Author:
Win Chaivipas, Magnus Danestig, Mohammed Ismail, Henrik Johansson, Laurent Billonnet
Title:
On-chip tuning of RF active filters
References:

[1] Win Chaivipas; Tuning of RF/Microwave Front-End Tunable Filters; Master Thesis on Electronic System Design; Stockholm; June 2003; Master Thesis IMIT/LECS-2003-28; Department of Microelectronics and Information Technology; Royal Institute of Technology; Kungliga Tekniska Högskolan.


[2] Halen; P. V.; ‚ÄĚSPICE-compatible Behavioral Phase-Space Simulation Techniques for Phase- Locked Systems‚ÄĚ; IEEE 1996


[3] Cadence Product Documentation; Affirma RF Simulator User Guide; Product Version 4.4.6; 2001: Appendix G ‚ÄėAn Introduction to the PLL library‚Äô


[4] Kuo; B. Automatic Control Systems; Singapore: Prentice Hall 1997; ISBN: 981-4009-40-7


[5] Mouzannar; W. Billonnet; L.; Jarry; B.; and Guillon; P.; ‚ÄúA New Concept For Realising Highly Tuneable Microwave Filters Using Recursive Principles‚ÄĚ; 28th European Microwave Conference Amsterdam 1998

GigaHertz 2003. Proceedings from the Seventh Symposium

Author:
Win Chaivipas, Magnus Danestig, Mohammed Ismail, Henrik Johansson, Laurent Billonnet
Title:
On-chip tuning of RF active filters
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