A thorough study of a master-slave tuning of an active RF filter is presented. The control technique is based on the Voltage-Controlled Filter based Phase Locked-Loop (VCF-PLL) approach. A phase domain simulation model was developed to model the RF filter and it‚Äôs control circuitry; to enable fast; and relatively accurate simulation of the phase locked loop. A linear model of the complete VCF-PLL was developed for the purpose of manual analysis; and to get a better understanding of the relationship between the VCF-PLL loop-gain and loop settling accuracy. With the aid of the phase domain simulation model a silicon implementation of the VCF-PLL in 0.18 um CMOS was made. Finally; the paper ends with the conclusion and analysis of the PLL tuning error.