Publications for Urban Ingelsson

Publications for Urban IngelssonCo-author map based on ISI articles 2007-

Keywords

wafer system stacked scheduling schedule rrc probability power planning p1687 instrument ieee ics fault constraints chips chip checkpointing access 3d

Journal Articles

Breeta Sengupta, Urban Ingelsson and Erik Larsson
  Scheduling Tests for 3D Stacked Chips under Power Constraints
  Journal of electronic testing, 2012, 28(1), 121-135.
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 Web of Science® Times Cited: 1

Farrokh Ghani Zadegan, Urban Ingelsson, Gunnar Carlsson and Erik Larsson
  Reusing and Retargeting On-Chip Instrument Access Procedures in IEEE P1687
  IEEE Design & Test of Computers, 2012, 29(2), 79-88.
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 Web of Science® Times Cited: 4

Chapters in Books

Dimitar Nikolov, Mikael Väyrynen, Urban Ingelsson, Erik Larsson and Virendra Singh
  Optimizing Fault Tolerance for Multi-Processor System-on-Chip
  Design and Test Technology for Dependable Systems-on-chip, Information Science Publishing, 2010, 578.


Anders Larsson, Urban Ingelsson, Erik Larsson and Krishnendu Chakrabarty
  Study on Combined Test-Data Compression and Test Planning for Testing of Modular SoCs
  Design and Test Technology for Dependable Systems-on-chip, Information Science Publishing, 2010, .


Conference Articles

Q. Wang, A. Wallin, Viacheslav Izosimov, Urban Ingelsson and Zebo Peng
  Test tool qualification through fault injection
  Test Symposium (ETS 2012), 2012.


Kim Petersen, Dimitar Nikolov, Urban Ingelsson, Gunnar Carlsson and Erik Larsson
  An MPSoCs Demonstrator for Fault Injection and Fault Handling in an IEEE P1687 Environment
  IEEE 17th European Test Symposimu (ETS 2012), Annecy, France, May 28-June 1, 2012, 2012.


Breeta SenGupta, Urban Ingelsson and Erik Larsson
  Test Planning for Core-based 3D Stacked ICs with Through-Silicon Vias
  VLSI 2012, 2012.


Breeta SenGupta, Urban Ingelsson and Erik Larsson
  Test Planning for Core-based 3D Stacked ICs under Power Constraints
  RASDAT 2012, 2012.


Dimitar Nikolov, Urban Ingelsson, Virendra Singh and Erik Larsson
  Level of Confidence Evaluation and Its Usage for Roll-back Recovery with Checkpointing Optimization
  5th Workshop on Dependable and Secure Nanocomputing (WSDN 2011), Hong Kong, June 27, 2011, 2011.


Dimitar Nikolov, Urban Ingelsson, Virendra Singh and Erik Larsson
  Study on the Level of Confidence for Roll-back Recovery with Checkpointing
  1st Intl. Workshop on Dependability Issues in Deep-submicron Technologies (DDT 2011), Trondheim, Norway, May 26-27, 2011, 2011.


Farrokh Ghani Zadegan, Urban Ingelsson, Erik Larsson and Gunnar Carlsson
  A Study of Instrument Reuse and Retargeting in P1687
  <em>IEEE Twelfth Workshop on RTL and High Level Testing (WRTLT 2011), MNIT Jaipur, India, November 25-26, 2011.</em>, 2011.


Breeta SenGupta, Urban Ingelsson and Erik Larsson
  Test Planning for 3D Stacked ICs with Through-Silicon Vias
  3D-TEST, 2011.


Breeta SenGupta, Urban Ingelsson and Erik Larsson
  Scheduling Tests for 3D Stacked Chips under Power Constraints
  Sixth IEEE International Symposium on Electronic Design, Test and Application (DELTA), 2011, Queenstown, NZ, 2011.


Urban Ingelsson, Shih-Yen Chang and Erik Larsson
  Measurement Point Selection for In-Operation Wear-Out Monitoring
  14th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS11), Cottbus, Germany, April 13-15, 2011., 2011.


Breeta SenGupta, Urban Ingelsson and Erik Larsson
  Test Scheduling for 3D Stacked ICs under Power Constraints
  2nd IEEE International Workshop on Reliability Aware System Design and Test (RASDAT), Chennai, India, January 6-7, 2011, 2011.


Farrokh Ghani Zadegan, Urban Ingelsson, Gunnar Carlsson and Erik Larsson
  Design Automation for IEEE P1687
  Design, Automation and Test in Europe (DATE 2011), Grenoble, France., 2011.


Erik Larsson, Farrokh Ghani Zadegan, Urban Ingelsson and Gunnar Carlsson
  Test scheduling on IJTAG
  Nordic Test Forum (NTF 2010), Drammen, Norway., 2010.


Breeta SenGupta, Urban Ingelsson and Erik Larsson
  Power Constrained Test Scheduling for 3D Stacked Chips: (poster)
  <em>1st IEEE International Workshop on Testing Three-Dimensional Stacked Integrated Circuits, Austin, TX, USA.</em>, 2010.


Urban Ingelsson
  Equation-Based Vdd-Aware Model for Resistive Bridge Behavior
  <em>IEEE International Workshop on Realiability Aware System Design and Test (RASDAT 2010), Bangalore, India, January 7-8, 2010.</em>, 2010.


Urban Ingelsson
  Vdd-Aware Bridge Defect Model
  <em>Swedish SoC Conference 2010, Kolmården, Sweden, May 3-4, 2010 (not reviewed, not printed).</em>, 2010.


Urban Ingelsson
  Vdd-Aware Model for the Voltage on Bridged Nodes
  <em>Workshop track of the IEEE European Test Symposium (ETS 2010), Prague, Czech Republic, May 24-28, 2010.</em>, 2010.


Dimitar Nikolov, Urban Ingelsson, Virendra Singh and Erik Larsson
  On-line Techniques to Adjust and Optimize Checkpointing Frequency
  <em>IEEE International Workshop on Realiability Aware System Design and Test (RASDAT 2010), Bangalore, India, January 7-8, 2010</em>, 2010.


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Dimitar Nikolov, Erik Karlsson, Urban Ingelsson, Virendra Singh and Erik Larsson
  Mapping and Scheduling of Jobs in Homogeneous NoC-based MPSoC
  <em>Swedish SoC Conference 2010, Kolmården, Sweden, May 3-4, 2010 (not reviewed, not printed)</em>, 2010.


Breeta SenGupta, Urban Ingelsson and Erik Larsson
  Scheduling Tests for Stacked 3D Chips under Power Constraints
  <em>Swedish SoC Conference 2010, Kolmården, Sweden, May 3-4, 2010 (not reviewed, not printed)</em>, 2010.


Mudassar Majeed, Daniel Ahlström, Urban Ingelsson, Gunnar Carlsson and Erik Larsson
  Efficient Embedding of Deterministic Test Data
  <em>Swedish SoC Conference 2010, Kolmården, Sweden, May 3-4, 2010 (not reviewed, not printed)</em>, 2010.


Mudassar Majeed, Daniel Ahlström, Urban Ingelsson, Gunnar Carlsson and Erik Larsson
  Efficient Embedding of Deterministic Test Data
  <em>19th IEEE Asian Test Symposium (ATS10), Shanghai, China, December 1-4, 2010.</em>, 2010.


Farrokh Ghani Zadegan, Urban Ingelsson, Gunnar Carlsson and Erik Larsson
  Test Time Analysis for IEEE P1687
  <em>Proceedings of the Asian Test Symposium</em>, 2010.


Dimitar Nikolov, Urban Ingelsson, Virendra Singh and Erik Larsson
  Estimating Error-Probability and Its Application for Optimizing Roll-back Recovery with Checkpointing
  <em>Proceedings - 5th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2010</em>, 2010.


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