Publications for Mark Vesterbacka
Co-author map based on ISI articles 2007-

Keywords

weights wave robust power p>in p>a logic linear-coded lattice full filters dac d/a converters converter consumption clock circuit bit-serial adder

Journal Articles

Shahzad Asif and Mark Vesterbacka
  Performance analysis of radix-4 adders
  Integration, 2012, 45(2), 111-120.
   Fulltext  PDF  

Syed Muhammad Yasser Sherazi, Shahzad Asif, Erik Backenius and Mark Vesterbacka
  Reduction of Substrate Noise in Sub Clock Frequency Range
  IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2010, 57(6), 1287-1297.
   Fulltext  PDF  
 Web of Science® Times Cited: 2

Ola Andersson and Mark Vesterbacka
  Modeling of glitches due to rise/fall asymmetry in current-steering digital-to-analog converters
  IEEE Transactions on Circuits and Systems I: Regular Papers, 2005, 52(11), 2265-2275.
 Web of Science® Times Cited: 6

Niklas Andersson, Ola Andersson, Mark Vesterbacka and Jacob Wikner
  Models and Implementation of a Dynamic Element Matching DAC
  Analog Integrated Circuits and Signal Processing, 2003, 34(1), 7-16.

Niklas Andersson, Ola Andersson, Mark Vesterbacka and Jacob Wikner
  Models and Implementation of a Dynamic Element Matching DAC
  Analog Integrated Circuits and Signal Processing, 2003, 34(1), 7-16.
 Web of Science® Times Cited: 1

Peter Nilsson, Mats Torkelsson, Mark Vesterbacka and Lars Wanhammar
  CMOS on-chip clock for digital signal processors
  Electronics Letters, 1993, 15(8), 669-670.

Chapters in Books

Peter Nilsson, Mats Torkelsson, Kent Palmkvist, Mark Vesterbacka and Lars Wanhammar
  A bit-serial CMOS digital IF-filter for mobile radio using an on-chip clock
  Mobile Communications Advanced Systems and Components, Springer-Vlg, cop., 1994, 510-521.


Conference Articles

Armin Jalili, S. M. Sayedi, Jacob Wikner, Kent Palmkvist and Mark Vesterbacka
  Calibration of high-resolution flash ADCS based on histogram test methods
  Electronics, Circuits, and Systems (ICECS), 2010 17th IEEE International Conference on, 2010.


Armin Jalili, S. M. Sayedi, Jacob Wikner, Niklas Andersson and Mark Vesterbacka
  Calibration of sigma-delta analog-to-digital converters based on histogram test methods
  NORCHIP, 2010, 2010.


J. Castro, A.J. Acosta and Mark Vesterbacka
  Geometry optimization in basic CMOS cells for improved power, leakage, and noise performances
  Proc. Int. Conf. Advances in Electronics and Micro-electronics, ENICS'08, 2008.


Erik Säll and Mark Vesterbacka
  Thermometer-to-binary decoders for flash analog-to-digital converters
  Proc. IEEE European Conf. Circuit Theory and Design, ECCTD'07, 2007.


 Web of Science® Times Cited: 1

Erik Backenius, Mark Vesterbacka and V.B. Settu
  Reduction of simultaneous switching noise in analog signal band
  Proc. IEEE European Conf. Circuit Theory and Design, ECCTD'07, 2007.


Magnus Karlsson and Mark Vesterbacka
  Digit-serial/parallel multipliers with improved throughput and latency
  Proc. 2006 IEEE Int. Symp. Circuits and Systems, ISCAS'06, 2006.


Erik Säll and Mark Vesterbacka
  6-bit flash ADC with dynamic element matching
  Proc. IEEE 24th Norchip Conf., NORCHIP'06, 2006.


Erik Backenius, Erik Säll, Ola Andersson and Mark Vesterbacka
  Programmable reference generator for on-chip measurement
  Proc. 24th IEEE Norchip Conf., NORCHIP'06, 2006.


Erik Backenius, Mark Vesterbacka and Robert Hägglund
  Effect of simultaneous switching noise on an analog filter
  Proc. Int. Conf. on Electronics, Circuits and Systems, ICECS'06, 2006.


Erik Backenius and Mark Vesterbacka
  Reduction of simultaneous switching noise in digital circuits
  Proc. 24th IEEE Norchip Conf., NORCHIP'06, 2006.


Magnus Karlsson, Mark Vesterbacka and Wlodek Kulesza
  Algorithm transformations in design of digit-serial FIR filters
  IEEE Workshop Signal Processing Systems Design and Implementation, SIPS'05, 2005.


Ola Andersson and Mark Vesterbacka
  A yield-enhancement strategy for binary-weighted DACs
  Proc. European Conf. Circuit Theory and Design 2005, ECCTD'05, 2005.


Erik Backenius and Mark Vesterbacka
  Pin assignment for low simultaneous switching noise
  Proc. Swedish System-on-Chip Conf., SSoCC'05, 2005.


Erik Säll and Mark Vesterbacka
  Mixed signal design in SOI CMOS technology
  Proc. Swedish System-on-Chip Conf., SSoCC'05, 2005.


Erik Säll and Mark Vesterbacka
  Design and evaluation of a comparator in CMOS SOI
  Proc. National Conf. on Radio Science, RVK'05, 2005.


Erik Säll and Mark Vesterbacka
  6 bit 1 GHz CMOS silicon-on-insulator flash analog-to-digital converter for read channel applications
  Proc. European Conf. on Circuit Theory and Design, ECCTD'05, 2005.


Erik Säll and Mark Vesterbacka
  Comparison of two thermometer-to-binary decoders for high-performance flash ADCs
  Proc. IEEE 23rd NORCHIP Conf., NORCHIP'05, 2005.


Krister Landernäs, Johnny Holmberg and Mark Vesterbacka
  Glitch reduction in digit-serial recursive filters using retiming
  Proc. 12th IEEE Int. Conf. on Electronics, Circuits and Systems, ICECS'05, 2005.


Erik Backenius and Mark Vesterbacka
  Introduction to substrate noise in SOI CMOS integrated circuits
  Proc. National Conf. on Radio Science, RVK'05, 2005.


Ola Andersson and Mark Vesterbacka
  Dynamic element matching in decomposed digital-to-analog converters
  Proc. IEEE NORCHIP'04, 2004.


Magnus Karlsson, Mark Vesterbacka and Wlodek Kulesza
  Pipelining of digit-serial processing elements in recursive digital filters
  Proc. 6th Nordic Signal Processing Symp., NORSIG'04, 2004.


Magnus Karlsson, Mark Vesterbacka and W. Kulesza
  A method for increasing the throughput of fixed coefficient digit-serial/parallel multipliers
  Proc. IEEE Int. Symp. on Circuits and Systems, ISCAS'04, 2004.


Krister Landernäs, Johnny Holmberg and Mark Vesterbacka
  A high-speed low-latency digit-serial hybrid adder
  IEEE Int. Symp. on Circuits and Systems, ISCAS'04, 2004.


Ola Andersson and Mark Vesterbacka
  Partial decomposition of digital-to-analog converters
  Proc. 12th IEEE Mediterranean Electrotechnical Conf., MELECON'04, 2004.


Erik Säll, Mark Vesterbacka and Ola Andersson
  A study of digital decoders in flash analog-to-digital converters
  Proc. IEEE Int. Symp. Circuits Syst., ISCAS'04, 2004.


Erik Säll, Ola Andersson and Mark Vesterbacka
  A dynamic element matching technique for flash analog-to-digital converters
  Proc. 8th Nordic Signal Processing Symp., NORSIG'04, 2004.


Erik Säll and Mark Vesterbacka
  Design of a comparator in CMOS SOI
  Proc. 4th IEEE Int. Workshop on System-on-Chip for Real-Time Applications, IWSOC'04, 2004.


Ola Andersson and Mark Vesterbacka
  A parameterized cell-based design approach for digital-to-analog converters
  Proc. IEEE Int. Workshop on System-on-Chip for Real-Time Applications, IWSOC'04, 2004.


Erik Säll and Mark Vesterbacka
  Silicon-on-insulator CMOS technology for system-on-chip
  Proc. Swedish System-on-Chip Conf., SSoCC'04, 2004.


Ola Andersson and Mark Vesterbacka
  A testbed for different codes in digital-to-analog converters
  Proc. Swedish System-on-Chip Conf. 2004, SSoCC'04, 2004.


Erik Säll and Mark Vesterbacka
  A multiplexer based decoder for flash analog-to-digital converters
  Proc. IEEE TENCON 2004, 2004.


Erik Backenius and Mark Vesterbacka
  A digital circuit with relaxed clocking
  Proc. Swedish System-on-Chip Conf., SSoCC'04, 2004.


Erik Backenius and Mark Vesterbacka
  Evaluation of a clocking strategy with relaxed constraints on clock edges
  Proc. TENCON'04, 2004.


Erik Backenius and Mark Vesterbacka
  Design of circuits for a robust clocking scheme
  Proc. 12th Mediterranean Electrotechnical Conf., MELECON'04, 2004.


Ola Andersson, Niklas Andersson, Mark Vesterbacka and Jacob Wikner
  A method of segmenting digital-to-analog converters
  Proc. IEEE Southwest Symposium on Mixed-Signal Design, SSMSD'03, 2003.


Erik Backenius and Mark Vesterbacka
  Characteristics of a differential D flip-flop
  Proc. Swedish System-on-Chip Conf., SSoCC'03, 2003.


Ola Andersson, Niklas Andersson, Mark Vesterbacka and Jacob Wikner
  A 14-Bit dual current-steering DAC
  Proc. Swedish System-on-Chip Conf., SSoCC'03, 2003.


Magnus Karlsson, Mark Vesterbacka and W. Kulesza
  Ripple-carry versus carry-look-ahead digit-serial adders
  Proc. NORCHIP'03, 2003.


Magnus Karlsson, Mark Vesterbacka and W. Kulesza
  Design of digit-serial pipelines with merged logic and latches
  Proc. NORCHIP'03, 2003.


Magnus Karlsson, Mark Vesterbacka and W. Kulesza
  A non-overlapping two-phase clock generator with adjustable duty cycle
  Electronic Proc. Nat. Symp. on Microwave Technique and High Speed Electronics, GHz'03, 2003.


Magnus Karlsson and Mark Vesterbacka
  A robust non-overlapping two-phase clock generator
  Proc. Swedish System-on-Chip Conf., SSoCC'03, 2003.


Krister Landernäs, Johnny Holmberg, Lennart Harnefors and Mark Vesterbacka
  Digit-serial implementation of LDI/LDD allpass filters
  Proc. 2002 IEEE Int. Symp. on Circuits and Systems, ISCAS'02, 2002.


Mark Vesterbacka, Ola Andersson, Niklas Andersson and Jacob Wikner
  Using different weights in DACs
  Proc. 4th IEE Int. Conf. on Advanced A/D and D/A Conversion Techniques and their Applications, ADDA'02, 2002.


Ola Andersson, Niklas Andersson, Mark Vesterbacka and Jacob Wikner
  Combining DACs for improved performance
  Proc. 4th IEE Int. Conf. on Advanced A/D and D/A Conversion Techniques and their Applications, ADDA'02, 2002.


Ola Andersson, Niklas Andersson, Mark Vesterbacka and Jacob Wikner
  A differential DAC architecture with variable common-mode level
  Proc. 2002 IEEE Int. Symp. on Circuits and Systems, ISCAS'02, 2002.


Erik Backenius, Mark Vesterbacka and Robert Hägglund
  Reduction of Clock Noise in Mixed-Signal Circuits
  Proc. National Conf. on Radio Science, RVK'02, 2002.


Robert Hägglund, Per Löwenborg and Mark Vesterbacka
  A polynomial-based division algorithm
  IEEE Int. Symp. Circuits and Systems, 2002, 2002.


Erik Backenius, Mark Vesterbacka and Robert Hägglund
  A strategy for reducing clock noise in mixed-signal circuits
  Proc. IEEE 45th Midwest Symp. on Circuits and Systems, MWSCAS'02, 2002.


Weidong Li, Mark Vesterbacka and Lars Wanhammar
  An FFT processor based on 16-point module
  Proc. NORCHIP'01, 2001.


Henrik Ohlsson, Oscar Gustafsson, Mark Vesterbacka and Lars Wanhammar
  A study on pipeline-interleaved digital filters for low power
  Proc. NORCHIP'01, 2001.


Johnny Holmberg, Krister Landernäs, Lennart Harnefors and Mark Vesterbacka
  Implementation aspects of second-order LDI/LDD allpass filters
  Proc. IEEE European Conf. on Circuit Theory and Design, ECCTD'01, 2001.


Mark Vesterbacka
  Linear-coded D/A converters with small relative error due to glitches
  Proc. IEEE 2001 Midwest Symp. on Circuits and Systems, MWSCAS'01, 2001.


Mark Vesterbacka and Jacob Wikner
  Design of encoders for linear-coded D/A converters
  Proc. 2001 IEEE Int. Symp. on Circuits and Systems, ISCAS'01, 2000.


Mark Vesterbacka and Jacob Wikner
  Dual matrix linear-code D/A converters
  Proc. 2000 IEEJ Int. Analog VLSI Workshop, IAVLSI'00, 2000.


Jacob Wikner and Mark Vesterbacka
  Characteristics of linear-coded D/A converters
  Proc. 2000 Southwest Symp. on Mixed-Signal Design, SSMSD'00, 2000.


Jacob Wikner and Mark Vesterbacka
  D/A conversion with linear-coded weights
  Proc. 2000 Southwest Symp. on Mixed-Signal Design, SSMSD'00, 2000.


Mark Vesterbacka and Jacob Wikner
  Characteristics of linear-coded D/A converters
  Mixed-Signal Design, 2000. SSMSD. 2000 Southwest Symposium on, 2000.


Mark Vesterbacka, Mikael Rudberg, Jacob Wikner and Niklas Andersson
  Dynamic element matching in D/A converters with restricted scrambling
  Proc. 7th IEEE Int. Conf. on Electronics, Circuits and Systems, ICECS'00, 2000.


Mark Vesterbacka
  A static CMOS master-slave flip-flop experiment
  Proc. 7th IEEE Int. Conf. on Electronics, Circuits and Systems, ICECS'00, 2000.


Mikael Rudberg, Mark Vesterbacka, Niklas Andersson and Jacob Wikner
  Glitch minimization and dynamic element matching in D/A converters
  Proc. 7th IEEE Int. Conf. on Electronics, Circuits and Systems, ICECS'00, 2000.


Mark Vesterbacka, Kent Palmkvist and Lars Wanhammar
  A CAD tool for synthesis of maximally fast lattice wave digital filters
  Proc. National Conf. on Radio Science and Communication, RVK'99, 1999.


Christer Larsson, Oscar Gustafsson, Mark Vesterbacka and Lars Wanhammar
  A tool for manual scheduling of DSP algorithms implemented in Java
  Proc. National Conf. on Radio Science and Communication, RVK'99, 1999.


Mark Vesterbacka
  A 14-transistor CMOS full adder with full voltage-swing nodes
  Proc. IEEE Workshop on Signal Processing Systems, SIPS'99, 1999.


Mark Vesterbacka
  A new six-transistor CMOS XOR circuit with complementary output
  Proc. IEEE 1999 Midwest Symp. on Circuits and Systems, MWSCAS'99, 1999.


Mark Vesterbacka
  A robust differential scan flip-flop
  Proc. 1999 IEEE Int. Symp. on Circuits and Systems, ISCAS'99, 1999.


Mark Vesterbacka, Håkan Johansson, Kent Palmkvist and Lars Wanhammar
  Implementation of narrow-band lattice wave digital filters
  Proc. 1998 IEEE Nordic Signal Processing Symp., NORSIG'98, 1998.


Magnus Karlsson, Mark Vesterbacka and Lars Wanhammar
  Low-swing charge recycle bus drivers
  Proc. 1998 IEEE Int. Symp. on Circuits and Systems, ISCAS'98, 1998.


Magnus Karlsson, Mark Vesterbacka and Lars Wanhammar
  Implementation of bit-serial adders using robust differential logic
  Proc. NORCHIP'97, 1997.


Magnus Karlsson, Mark Vesterbacka and Lars Wanhammar
  Design and implementation of a complex multiplier using distributed arithmetic
  Proc. IEEE Workshop on Signal Processing Systems, SIPS'97, 1997.


Magnus Karlsson, Mark Vesterbacka and Lars Wanhammar
  Novel low-swing bus-drivers and charge-recycle architectures
  IEEE Workshop on Signal Processing Systems, SIPS 97, 1997.


Magnus Karlsson, Mark Vesterbacka and Lars Wanhammar
  A robust differential logic style with NMOS logic nets
  Proc. IEE Int. Workshop on Signal Processing, IWSSIP'97, 1997.


Johan Melander, Torbjörn Widhe, Kent Palmkvist, Mark Vesterbacka and Lars Wanhammar
  An FFT processor based on the SIC architecture with asynchronous PE
  Proc. IEEE 1996 Midwest Symp. on Circuits and Systems, MWSCAS'96, 1996.


Kent Palmkvist, Mark Vesterbacka and Lars Wanhammar
  Arithmetic transformations for fast bit-serial VLSI implementations of recursive algorithms
  Proc. IEEE Nordic Signal Processing Symp., NORSIG'96, 1996.


Mark Vesterbacka, Kent Palmkvist and Lars Wanhammar
  High-speed multiplication in bit-serial digital filters
  Proc. IEEE Nordic Signal Processing Symp., NORSIG'96, 1996.


Mark Vesterbacka, Kent Palmkvist and Lars Wanhammar
  A comparison of three lattice wave digital filter implementations
  Proc. Int. Conf. on Signal Processing Applications & Technology, ICSPAT'96, 1996.


Mark Vesterbacka, Kent Palmkvist and Lars Wanhammar
  Maximally fast, bit-serial lattice wave digital filters
  Proc. IEEE Digital Signal Processing Workshop, DSPWS'96, 1996.


Mark Vesterbacka, Kent Palmkvist and Lars Wanhammar
  On implementation of fast, bit-serial loops
  Proc. IEEE 39th Midwest Symp. Circuits and Systems, MWSCAS'96, 1996.


Håkan Johansson, Kent Palmkvist, Mark Vesterbacka and Lars Wanhammar
  High-speed lattice wave digital filters for interpolation and decimation
  Proc. National Conf. on Radio Science and Communication, RVK'96, 1996.


Mark Vesterbacka, Kent Palmkvist and Lars Wanhammar
  Serial squarers and serial/serial multipliers
  Proc. National Conf. on Radio Science and Communication, RVK'96, 1996.


Mark Vesterbacka, Kent Palmkvist and Lars Wanhammar
  Sign-extension and quantization in bit-serial digital filters
  Proc. 3rd IEEE Int. Conf. on Electronics, Circuits and Systems, ICECS'96, 1996.


Kent Palmkvist, Mark Vesterbacka and Lars Wanhammar
  Implementation of static DSP algorithms using multiplexed PEs
  Proc. 3rd IEEE Int. Conf. on Electronics, Circuits and Systems, ICECS'96, 1996.


Johan Melander, Torbjörn Widhe, Peter Sandberg, Kent Palmkvist, Mark Vesterbacka and Lars Wanhammar
  Implementation of a bit-serial FFT processor with a hierarchical control structure
  Proc. 1995 European Conf. on Circuit Theory and Design, ECCTD'95, 1995.


Kent Palmkvist, Mark Vesterbacka, Peter Sandberg and Lars Wanhammar
  Scheduling of data-independent recursive algorithms
  Proc. 1995 European Conf. on Circuit Theory and Design, ECCTD'95, 1995.


Kent Palmkvist, Peter Sandberg, Mark Vesterbacka and Lars Wanhammar
  Digital IF filter for mobile radio
  Proc. Nordic Radio Symposium, NRS'95, 1995.


Mark Vesterbacka, Kent Palmkvist, Peter Sandberg and Lars Wanhammar
  Implementation of fast bit-serial lattice wave digital filters
  Proc. 1994 IEEE Int. Symp. on Circuits and Systems, ISCAS'94, 1994.


Mark Vesterbacka, Kent Palmkvist, Peter Sandberg and Lars Wanhammar
  Implementation of fast DSP algorithms using bit-serial arithmetic
  National Conf. on Electronic Design Automation, EDA-meeting'94, 1994.


Peter Nilsson, Mats Torkelsson, Mark Vesterbacka and Lars Wanhammar
  A bit-serial realization of a lattice wave digital intermediate frequency filter
  Proc. Sixth Annual IEEE Int. ASIC Conf. and Exhibit, ASIC'93, 1993.


Peter Nilsson, Mats Torkelsson, Mark Vesterbacka and Lars Wanhammar
  A high performance bit-serial lattice wave digital intermediate frequency filter chip
  Proc. European Conf. on Circuit Theory and Design, ECCTD'93, 1993.


Mark Vesterbacka
  Realization of serial/parallel multipliers with fixed coefficients
  Proc. National Conf. on Radio Science, RVK'93, 1993.


Kent Palmkvist and Mark Vesterbacka
  Design and implementation of an interpolator using wave digital filters
  Proc. National Conf. on Radio Science, RVK'93, 1993.


Peter Nilsson, Mats Torkelsson, Mark Vesterbacka and Lars Wanhammar
  A lattice wave digital intermediate frequency filter chip
  Proc. National Conf. on Radio Science, RVK'93, 1993.


Kent Palmkvist, Mark Vesterbacka, Erik Nordhamn and Lars Wanhammar
  A fast bit-serial lattice wave digital filter
  Proc. NUTEK Workshop on Digital Communications, 1992.


Ph.D. Theses

Erik Backenius
  Reduction of Substrate Noise in Mixed-Signal Circuits
  2007.


  Fulltext PDF

Erik Säll
  Implementation of Flash Analog-to-Digital Converters in Silicon-on-Insulator CMOS Technology
  2007.


  Fulltext PDF

Ola Andersson
  Modeling and Implementation of Current-Steering Digital-to-Analog Converters
  2005.


  Fulltext PDF

Magnus Karlsson
  Implementation of digit-serial filters
  2005.


  Fulltext PDF

Licentiate Theses

Erik Backenius
  On Reduction of Substrate Noise in Mixed-Signal Circuits
  2005.


  Fulltext PDF

Erik Säll
  Implementation of Flash Analog-to-Digital Converters in Silicon-on-Insulator Technology
  2005.


  Fulltext PDF