Publications for Martin Hansson
Co-author map based on ISI articles 2007-

Keywords

vlsi static robustness resonant power load leakage keeper jitter flip-flops flip-flop energy dissipation conventional cmos clocking clock circuits circuit chip

Journal Articles

Behzad Mesgarzadeh, Martin Hansson and Atila Alvandpour
  Jitter Characteristic in Charge Recovery Resonant Clock Distribution
  IEEE Journal of Solid-State Circuits, 2007, 42(7), 1618-1625 .
 Web of Science® Times Cited: 15

Chapters in Books

Peter Caputa, Henrik Fredriksson, Martin Hansson, Stefan Andersson, Atila Alvandpour and Christer Svensson
  An extended transition energy cost model for buses in deep submicron technologies
  Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation: 14th International Workshop, PATMOS 2004, Santorini, Greece, September 15-17, 2004. Proceedings, Springer Berlin/Heidelberg, 2004, 849-858.


Conference Articles

Ali Fazli Yeknami, Martin Hansson, Behzad Mesgarzadeh and Atila Alvandpour
  A low voltage and process variation tolerant SRAM cell in 90-nm CMOS
   International Symposium on VLSI Design Automation and Test, 2010.


Mark Anders, Himanshu Kaul, Martin Hansson, Ram Krishnamurthy and Shekhar Borkar
  A 2.9Tb/s 8W 64-Core Circuit-switched Network-on-Chip in 45nm CMOS
  European Solid-State Circuits Conference,2008, 2008.


 Web of Science® Times Cited: 3

Martin Hansson and Atila Alvandpour
  Comparative analysis of process variation impact on flip-flop power-performance.
  IEEE International Symposium on Circuits and Systems,2007, 2007.


 Web of Science® Times Cited: 8

Martin Hansson and Atila Alvandpour
  Impact of process variation on flip-flop power-performance in 90nm CMOS.
  Swedish System-on-Chip Conference SSoCC,2007, 2007.


Behzad Mesgarzadeh, Martin Hansson and Atila Alvandpour
  Low-power low-jitter bufferless resonant clocking.
  Swedish System-on-Chip Conference SSoCC,2007, 2007.


Behzad Mesgarzadeh, Martin Hansson and Atila Alvandpour
  Low-Power Bufferless Resonant Clock Distribution Networks
  Proceedings of the 50th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), 2007.


Nasir Mehmood, Martin Hansson and Atila Alvandpour
  An energy-efficient 32-bit multiplier architecture in 90-nm CMOS.
  24th Norchip Conference,2006, 2006.


Martin Hansson and Atila Alvandpour
  A Leakage Compensation Technique for Dynamic Latches and Flip flops in Nano-scale CMOS.
  IEEE System-on-Chip Conference SoCC,2006, 2006.


Martin Hansson, Behzad Mesgarzadeh and Atila Alvandpour
  1.56 HGz On-chip Resonant Clocking in 130nm CMOS.
  IEEE Custom Integrated Circuits Conference CICC,2006, 2006.


 Web of Science® Times Cited: 14

Steven K. Hsu, Martin Hansson, Amit Agarwal, Sanu K. Mathew, Atila Alvandpour and Ram K. Krishnamurthy
  A 9GHz 320x80bit low leakage microcode read only memory in 65nm CMOS.
  ESSCIRC 2006,2006, 2006.


Martin Hansson, Behzad Mesgarzadeh and Atila Alvandpour
  A low-power on-chip resonant clocking technique.
  Swedish system-on-chip conference.,2006, 2006.


Martin Hansson, Behzad Mesgarzadeh and Atila Alvandpour
  1.56-GHz On-Chip Resonant Clocking with 2.3X Clock Power-Saving in 130-nm CMOS
  Proceedings of the European Solid-State Circuit Conference (ESSCIRC), 2006.


Martin Hansson and Atila Alvandpour
  Study of Sinusoidally Clocked Flip-Flops.
  SSoCC 2005,2005, 2005.


Martin Hansson and Atila Alvandpour
  Power-Performance Analysis of Sinusoidally Clocked Flip-Flops
  Proceedings of 23rd IEEE NORCHIP Conference, Oulu, Finland, November 2005, 2005.


Martin Hansson, Atila Alvandpour, Steven K. Hsu and Ram K. Krishnamurthy
  A Process Variation Tolerant Technique for sub-70 nm Latches and Flip-Flops
  Proceedings of the 23rd IEEE NORCHIP Conference, Oulu, Finland, November 2005, 2005.


Martin Hansson and Atila Alvandpour
  A leakage compensation technique for low-power dynamic latches.
  SSoCC 2004,2004, 2004.


Robert Malmqvist, Martin Hansson, Carl Samuelsson and Mattias Alfredson
  Some important aspects on the design of active microwave filters using standard RF silicon process technologies.
  European Microwave Conference,2004, 2004.


Martin Hansson and Atila Alvandpour
  A Low Clock Load Conditional Flip-Flop
  Proceedings of IEEE International System-on-Chip Conference, Santa Clara, California, USA, September 2004, 2004.


Peter Caputa, Henrik Fredriksson, Martin Hansson, Stefan Andersson, Atila Alvandpour and Christer Svensson
  An Extended Transition Energy Cost Model for Buses in Deep Submicron Technologies
  Proceedings of the Power and Timing Modeling, Optimization and Simulation Conference, Santorini, Greece, 2004.


 Web of Science® Times Cited: 1

Robert Malmqvist and Martin Hansson
  SiGe BiCMOS LNA´s and tunable active filter for future wide-band multi-purposte array antennas.
  GigaHerz 2003,2003, 2003.


Martin Hansson and Atila Alvandpour
  Crosstalk analysis considering power and delay on interconnects.
  Norchip Conference,2003, 2003.


Ph.D. Theses

Martin Hansson
  Low-Power Clocking and Circuit Techniques for Leakage and Process Variation Compensation
  2008.


  Fulltext PDF

Licentiate Theses

Martin Hansson
  Low-Power Multi-GHz Circuit Techniques for On-chip Clocking
  2006.


  Fulltext PDF