Publications for Henrik Fredriksson
Co-author map based on ISI articles 2007-
Journal Articles
Chapters in Books
Conference Articles
Henrik Fredriksson and Christer Svensson
Improvement potential of multi-drop DRAM memory buses
Swedish System-on-Chip Conference SSoCC,2008, 2008.
|
Henrik Fredriksson and Christer Svensson
2.6 Gb/s Over a Four-Drop Bus Using an Adaptive 12-Tap DFE
European Solid-State Circuits Conference,2008, 2008.
|
Henrik Fredriksson and Christer Svensson
3-Gb/s, Single-ended Adaptive Equalization of Bidirectional Data over a Multi-drop Bus.
2007 International Symposium on System-on-Chip.,2007, 2007.
|
Henrik Fredriksson, Christer Svensson and Atila Alvandpour
A 3.4 GB/S low latency 1 bit input digital FIR-filter in 0.13 uM CMOS.
Mixed Design of Integrated Circuits and Systems MIXDES,2007, 2007.
|
Henrik Fredriksson and Christer Svensson
Single-ended adaptive equalization of bidirectional data communication utilizing reciprocity.
Swedish System-on-Chip Conference SSoCC,2007, 2007.
|
Henrik Fredriksson and Christer Svensson
Blind adaptive mixed-signal DFE for Gb/s, multi-drop, buses.
International symposium on VLSI design, automation, and test VLSI-DAT.,2006, 2006.
|
Henrik Fredriksson and Christer Svensson
Blind adaptive mixed-signal DFE for a four drop memory bus.
Swedish system-on-chip conference.,2006, 2006.
|
Henrik Fredriksson and Christer Svensson
Mixed-Signal DFE for Multi-Drop, Gb/s, Memory Buses.
SSoCC 2005,2005, 2005.
|
Henrik Fredriksson and Christer Svensson
Mixed-signal DFE for multi-drop, Gb/s, memory buses - a feasibility study.
SOC Conference,2004, 2004.
|
Peter Caputa, Henrik Fredriksson, Martin Hansson, Stefan Andersson, Atila Alvandpour and Christer Svensson
An Extended Transition Energy Cost Model for Buses in Deep Submicron Technologies
Proceedings of the Power and Timing Modeling, Optimization and Simulation Conference, Santorini, Greece, 2004.
Web of Science® Times Cited: 1
|
Martin Andersson, Jonas Elbornsson, Jan-Erik Eklund, Joakim Alvbrant and Henrik Fredriksson
Verification of a blind mismatch error equalization method for randomly interleaved ADCs using 2.5V/12/30MSs PSAADC.
ESSCIRC 2003,2003, 2003.
|
Ph.D. Theses
Licentiate Theses
Ph.D., Lic. Theses
