Publications for Erik Backenius
Co-author map based on ISI articles 2007-

Keywords

times switching strategy soi simultaneous rise power ns mixed-signal flip-flop fall d coupling consumption cmos clock circuits circuit chip analog

Conference Articles

Erik Backenius, Mark Vesterbacka and V.B. Settu
  Reduction of simultaneous switching noise in analog signal band
  Proc. IEEE European Conf. Circuit Theory and Design, ECCTD'07, 2007.


Erik Backenius, Mark Vesterbacka and Robert Hägglund
  Effect of simultaneous switching noise on an analog filter
  Proc. Int. Conf. on Electronics, Circuits and Systems, ICECS'06, 2006.


Erik Backenius and Mark Vesterbacka
  Reduction of simultaneous switching noise in digital circuits
  Proc. 24th IEEE Norchip Conf., NORCHIP'06, 2006.


Erik Backenius, Erik Säll, Ola Andersson and Mark Vesterbacka
  Programmable reference generator for on-chip measurement
  Proc. 24th IEEE Norchip Conf., NORCHIP'06, 2006.


Erik Backenius, Erik Säll and Oscar Gustafsson
  Bidirectional Conversion to Minimum Signed-Digit Representation
  Circuits and Systems, 2006. ISCAS 2006., 2006.


Erik Backenius and Mark Vesterbacka
  Pin assignment for low simultaneous switching noise
  Proc. Swedish System-on-Chip Conf., SSoCC'05, 2005.


Erik Backenius and Mark Vesterbacka
  Introduction to substrate noise in SOI CMOS integrated circuits
  Proc. National Conf. on Radio Science, RVK'05, 2005.


Erik Backenius and Mark Vesterbacka
  A digital circuit with relaxed clocking
  Proc. Swedish System-on-Chip Conf., SSoCC'04, 2004.


Erik Backenius and Mark Vesterbacka
  Design of circuits for a robust clocking scheme
  Proc. 12th Mediterranean Electrotechnical Conf., MELECON'04, 2004.


Erik Backenius and Mark Vesterbacka
  Evaluation of a clocking strategy with relaxed constraints on clock edges
  Proc. TENCON'04, 2004.


Erik Backenius and Mark Vesterbacka
  Characteristics of a differential D flip-flop
  Proc. Swedish System-on-Chip Conf., SSoCC'03, 2003.


Erik Backenius, Mark Vesterbacka and Robert Hägglund
  Reduction of Clock Noise in Mixed-Signal Circuits
  Proc. National Conf. on Radio Science, RVK'02, 2002.


Erik Backenius, Mark Vesterbacka and Robert Hägglund
  A strategy for reducing clock noise in mixed-signal circuits
  Proc. IEEE 45th Midwest Symp. on Circuits and Systems, MWSCAS'02, 2002.


Ph.D. Theses

Erik Backenius
  Reduction of Substrate Noise in Mixed-Signal Circuits
  2007.


  Fulltext PDF

Licentiate Theses

Erik Backenius
  On Reduction of Substrate Noise in Mixed-Signal Circuits
  2005.


  Fulltext PDF