Publications for Dake Liu
Co-author map based on ISI articles 2007-

Keywords

turbo throughput simd silicon signal programmable processors processing power platform nogap memory lte interleaver epuma detector computing baseband architecture access

Journal Articles

Rizwan Asghar, Di Wu, Ali Saeed, Yulin Huang and Dake Liu
  Implementation of a Radix-4, Parallel Turbo Decoder and Enabling the Multi-Standard Support
  Journal of Signal Processing Systems, 2012, 66(1), 25-41.

Ingemar Ragnemalm and Dake Liu
  Adapting the ePUMA Architecture for Hand-held Video Games
  International Journal of Computer Information Systems and Industrial Management Applications, 2012, 4, 153-160.

Di Wu, Johan Eilert and Dake Liu
  Implementation of a High-Speed MIMO Soft-Output Symbol Detector for Software Defined Radio
  Journal of Signal Processing Systems, 2011, 63(1), 27-37.
 Web of Science® Times Cited: 3

Dake Liu, Joar Sohl and Jian Wang
  Parallel Programming and its architectures Based on data access separated algorithm Kernels
  International Journal of Embedded and Real-Time Communication Systems, 2010, 1(1), 65-85.

Di Wu, Johan Eilert, Rizwan Asghar, Dake Liu, A. Nilsson, E. Tell and E. Alfredsson
  System architecture for 3GPP-LTE modem using a programmable baseband processor
  International Journal of Embedded and Real-Time Communication Systems, 2010, 1(3), 44-64.

Di Wu, Johan Eilert, Rizwan Asghar and Dake Liu
  VLSI Implementation of a Fixed-Complexity Soft-Output MIMO Detector for High-Speed Wireless
  EURASIP Journal on Wireless Communications and Networking, 2010, 2010(893184), .
   Fulltext  PDF  
 Web of Science® Times Cited: 1

Rizwan Asghar and Dake Liu
  Multimode flex-interleaver core for baseband processor platform
  Journal of Computer Systems, Networks and Communications, 2010, 2010, 1-16.

Rizwan Asghar, Di Wu, Johan Eilert and Dake Liu
  Memory Conflict Analysis and Implementation of a Re-configurable Interleaver Architecture Supporting Unified Parallel Turbo Decoding
  Journal of Signal Processing Systems for Signal, Image, and Video Technology, 2010, 60(1), 15-29.
   Fulltext  PDF  
 Web of Science® Times Cited: 5

Rizwan Asghar and Dake Liu
  Low Complexity Multi Mode Interleaver Core for WiMax with Support for Convolutional Interleaving
  International Journal of Electronics, Communications and Computer Engineering, 2009, 1(1), 20-29.

Dake Liu, Anders Nilsson and Johan Eilert
  Bridging Dream and Reality: Programmable Baseband Processors for Software-Defined Radio
  IEEE COMMUNICATIONS MAGAZINE, 2009, 47(9), 134-140.
 Web of Science® Times Cited: 10

Per Karlström, Andreas Ehliar and Dake Liu
  High performance, low-latency field-programmable gate array-based floating-point adder and multiplier units in a Virtex 4
  IET Computers and digital techniques, 2008, 2, 305-313.
 Web of Science® Times Cited: 4

Tomas Henriksson, Ulf Nordqvist and Dake Liu
  Specification of a configurable general-purpose protocol processor
  IEE Proceedings - Circuits Devices and Systems, 2002, 149(3), 198-202.
 Web of Science® Times Cited: 7

Books

Dake Liu
  Embedded DSP Processor Design: Application Specific Instruction Set Processors
  Elsevier Inc., Morgan Kaufmann Publishers, 2008.


Chapters in Books

Per Karlström and Dake Liu
  NoGAP, a Micro Architecture Construction Framework
  Embedded Computer Systems: Architectures, Modeling, and Simulation, Springer Berlin/Heidelberg, 2009, 171-180.


Dake Liu and Eric Tell
  Low-Power Baseband Processors for Communications
  Low-Power Electronics Design, CRC Press, 2004, -912.


Ulf Nordqvist and Dake Liu
  Packet classification and termination in a protocol processor
  Network processor design - Issues and practices, vol 2, Elsevier, 2003, 159-180.


Conference Articles

Jian Wang, Andréas Karlsson, Joar Sohl and Dake Liu
  Convolutional Decoding on Deep-pipelined SIMD Processor with Flexible Parallel Memory
  Digital System Design (DSD), 2012, 2012.


Joar Sohl, Jian Wang, Andréas Karlsson and Dake Liu
  Automatic Permutation for Arbitrary Static Access Patterns
  Parallel and Distributed Processing with Applications (ISPA), 2012, 2012.


Jian Wang, Andréas Karlsson, Joar Sohl, Magnus Pettersson and Dake Liu
  A multi-level arbitration and topology free streaming network for chip multiprocessor
  ASIC (ASICON), 2011, 2011.


Dake Liu, Andréas Karlsson, Joar Sohl, Jian Wang, Magnus Petersson and Wenbiao Zhou
  ePUMA embedded parallel DSP processor with Unique Memory Access
  Information, Communications and Signal Processing (ICICS), 2011, 2011.


Jian Wang, Joar Sohl, Andréas Karlsson and Dake Liu
  An Efficient Streaming Star Network for Multi-core Parallel DSP Processor
  Networking and Computing (ICNC), 2011, 2011.


Ingemar Ragnemalm and Dake Liu
  Towards using the ePUMA architecture for hand-held video games
  COMPUTER GRAPHICS,  VISUALIZATION, COMPUTER VISION  AND IMAGE PROCESSING 2010, 2010.


Jian Wang, Joar Sohl and Liu Dake
  Architectural Support for Reducing Parallel Processing Overhead in an Embedded Multiprocessor
  EUC '10 Proceedings of the 2010 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing, 2010.


  Fulltext PDF

Jian Wang, Joar Sohl, Olof Kraigher and Liu Dake
  Software programmable data allocation in multi-bank memory of SIMD processors
  Proceedings of the 2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, 2010.


  Fulltext PDF

Jian Wang, Sohl Joar, Kraigher Olof and Dake Liu
  ePUMA: a novel embedded parallel DSP platform for predictable computing
  International Conference on Information and Electroincs Engineering, 2010.


  Fulltext PDF

Wenbiao Zhou, Per Karlström and Dake Liu
  NoGapCL: A flexible common language for processor hardware description
  The IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010.


Per Karlström, Wenbiao Zhou and Dake Liu
  Automatic Port and Bus Sizing in NoGAP
  International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, 2010.


Per Karlström, Wenbiao Zhou and Dake Liu
  Automatic Assembler Generator for NoGAP
  Ph.D. Research in Microelectronics and Electronics, 2010.


Per Karlström, Wenbiao Zhou and Dake Liu
  Operation Classification for Control Path Synthetization with NoGAP
  Seventh International Conference on Information Technology, 2010.


Di Wu, Johan Eilert, Rizwan Asghar, Dake Liu and Qun Ge
  VLSI Implementation of A Multi-Standard MIMO Symbol Detector for 3GPP LTE and WiMAX
  Wireless Telecommunications Symposium (WTS), 2010, 2010.


Rizwan Asghar and Dake Liu
  Towards Radix-4, Parallel Interleaver Design to Support High-Throughput Turbo Decoding for Re-Configurability
  33rd IEEE SARNOFF Symposium, Princeton, NJ, USA, 2010.


Wu Di, Johan Eilert, Dake Liu, Anders Nilsson, Eric Tell and Erik Alfredsson
  System Architecture for 3GPP LTE Modem Using a Programmable Baseband Processo
  International Symposium on System-on-Chip (SoC 2009), 2009.


Di Wu, Rizwan Asghar, Yulin Huang and Dake Liu
  Implementation of a high-speed parallel Turbo decoder for 3GPP LTE terminals
  IEEE 8th International Conference on ASIC, ASICON'09., 2009.


Rizwan Asghar and Dake Liu
  2-D Realization of WiMAX Channel Interleaver for Efficient Hardware Implementation
  <em>Proceedings of World Academy of Science, Engineering and Technology</em> (ISSN: 2070-3740), 2009.


Joar Sohl, Jian Wang and Dake Liu
  Large Matrix Multiplication on a Novel Heterogeneous Parallel DSP Architecture
  ADVANCED PARALLEL PROCESSING TECHNOLOGIES, PROCEEDINGS, 2009.


Andreas Ehliar and Dake Liu
  An Asic Perspective on FPGA Optimizations
  19th International Conference on Field Programmable Logic and Applications (FPL), 2009.


 Web of Science® Times Cited: 1

Di Wu, Johan Eilert and Dake Liu
  Evaluation of MIMO Symbol Detectors for 3GPP LTE Terminals
  17th European Signal Processing Conference (EUSIPCO), 2009.


Rizwan Asghar, Di Wu, Johan Eilert and Dake Liu
  Memory Conflict Analysis and Interleaver Design for Parallel Turbo Decoding Supporting HSPA Evolution
  12th EUROMICRO Conference on Digital System Design, 2009.


 Web of Science® Times Cited: 2

Rizwan Asghar and Dake Liu
  Low Complexity Hardware Interleaver for MIMO-OFDM based Wireless LAN
  IEEE International Symposium on Circuits and Systems (ISCAS), 2009.


Andreas Ehliar and Dake Liu
  An ASIC Perspective on High Performance FPGA Design
  , 2009.


Anders Nilsson, Eric Tell and Dake Liu
  An 11 mm(2), 70 mW Fully Programmable Baseband Processor for Mobile WiMAX and DVB-T/H in 0.12 mu m CMOS
  IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, USA: Vol 44, number 1, 2009.


 Web of Science® Times Cited: 9

Rizwan Asghar and Dake Liu
  Dual standard re-configurable hardware interleaver for turbo decoding
  3rd International Symposium on Wireless Pervasive Computing, 2008. ISWPC'08, 2008.


Johan Eilert, Di Wu and Dake Liu
  Real-Time Alamouti STBC Decoding on A Programmable Baseband Processor
  4th IEEE International Conference on Circuits and Systems for Communications, 26-28 May, Shanghai, China, 2008.


Di Wu, Johan Eilert and Dake Liu
  A Programmable Lattice-Reduction Aided Detector for MIMO-OFDMA
  4th IEEE International Conference on Circuits and Systems, ICCSC,2008, 2008.


Qi Wang, Di Wu, Johan Eilert and Dake Liu
  Cost Analysis of Channel Estimation in MIMO-OFDM for Software Defined Radio
  WCNC 2008: IEEE WIRELESS COMMUNICATIONS &amp; NETWORKING CONFERENCE, 2008.


Johan Eilert, Di Wu and Dake Liu
  Implementation of a Programmable Linear MMSE Detector for MIMO-OFDM
  IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP,2008, 2008.


 Web of Science® Times Cited: 3

Rizwan Asghar and Dake Liu
  Very Low Cost Configurable Hardware Interleaver for 3G Turbo Decoding
  IEEE Internation Conference on Information and Communication Tech from Theory to Applications, ICTTA,2008, 2008.


Andreas Ehliar, Per Karlström and Dake Liu
  A High Performance Microprocessor with DSP Extensions Optimized for the Virtex-4 FPGA
  International Conference on Field Programmable Logic and Applications FLP 2008, Heidelberg, Germany, 2008, 2008.


 Web of Science® Times Cited: 1

Rizwan Asghar and Dake Liu
  Programmable Parallel Data-path for FEC
  Swedish System-on-Chip Conference, SSoCC,2007, 2007.


Andreas Ehliar, Johan Eilert and Dake Liu
  A Comparison of Three FPGA Optimized NoC Architectures
  Swedish System-on-Chip Conference, SSoCC,2007, 2007.


Di Wu, Boonshyang Lim, Johan Eilert and Dake Liu
  Parallelization of High-Performance Video Encoding on a Single-Chip Multiprocessor
  IEEE International Conference on Signal Processing and Communications,2007, 2007.


Di Wu, Yi-Hsien Li, Johan Eilert and Dake Liu
  Real-Time Space-Time Adaptive Processing on the STI CELL Multiprocessor
  4th European Radar Conference,2007, 2007.


Di Wu, Johan Eilert and Dake Liu
  Lattice-Reduction Aided Multi-User STBC Decoding with Resource Constraints
  2007 IEEE 18TH INTERNATIONAL SYMPOSIUM ON PERSONAL, INDOOR AND MOBILE RADIO COMMUNICATIONS, 2007.


Johan Eilert, Di Wu, Dake Liu, Dandan Wang, Naofal Al-Dhahir and Hlaing Minn
  Complexity Reduction of Matrix Manipulation for Multi-User STBC-MIMO Decoding
  IEEE Sarnoff Symmposium,2007, 2007.


Di Wu, Johan Eilert, Dake Liu, Dandan Wang, Naofal Al-Dhahir and Hlaing Minn
  Fast Complex Valued Matrix Inversion for Multi-User STBC-MIMO Decoding
  IEEE Computer Society Annual Aymposium on VLSI, ISVLSI,2007, 2007.


Johan Eilert, Di Wu and Dake Liu
  Efficient Complex Matrix Inversion for MIMO Software Defined Radio
  International Symposium on Circuits and Systems, ISCAS,2007, 2007.


 Web of Science® Times Cited: 11

Anders Nilsson and Dake Liu
  Area efficient fully programmable baseband processors
  SAMOSVII Workshop; SAMOS, Greece, July 16-19, 2007.


Andreas Ehliar and Dake Liu
  Thinking outside the flow: Creating customized backend tools for Xilinx based designs
  4th annual FPGAworld Conference, Stockholm, 2007, 2007.


Andreas Ehliar and Dake Liu
  An FPGA based Open Source Network-on-chip Architecture
  17th International Conference on Fileld Programmable Logic and Applications, FPL, Amsterdam, Holland, 2007, 2007.


Per Karlström, Andreas Ehliar and Dake Liu
  High Performance, Low Latency FPGA based Floating Point Adder and Multiplier Units in a Virtex 4
  NORCHIP 2006: The Nordic Microelectronics Event. 2006, 2006.


Christer Svensson and Dake Liu
  Presenting efficient hardware solutions for SDR terminals.
  Software Defined Radio 2006,2006, 2006.


Haiyan Jiao, Anders Nilsson, Eric Tell and Dake Liu
  MIPS Cost Estimation for OFDM-VBLAST systems
  WCNC, IEEE Wireless Communications and Networking,2006, 2006.


Anders Nilsson and Dake Liu
  Multi-standard support in SIMT programmable baseband processors
  SSoCC Swedish System-on-chip Conference,2006, 2006.


Andreas Ehliar and Dake Liu
  A Network on Chip based gigabit Ethernet router implemented on an FPGA
  SSoCC Swedish System-on-Chip Conference,2006, 2006.


Di Wu, Per Karlström, Johan Eilert, Andreas Ehliar and Dake Liu
  Media DSP: An Application Specific Heterogeneous Multiprocessor SoC
  SSoCC Swedish System-on-Chip Conference,2006, 2006.


Johan Eilert and Dake Liu
  Early Exploratioin of MIPS Cost and Memory Cost Trade-off for Media DSP Media Processor
  SSoCC Swedish System-on-Chip Conference,2006, 2006.


Di Wu, Tiejun Hu and Dake Liu
  A Single-Issue DSP based Multi-standard Media Processor for Mobile Platform
  ARCS,2006, 2006.


Oskar Flordal, Oskar Flordal, Di Wu, Di Wu, Dake Liu and Dake Liu
  Accelerating CABAC Encoding for Multi-standard Media with Configurability
  IEEE IPDPS,2006, 2006.


Anders Nilsson, Eric Tell and Dake Liu
  Simultaneous multistandard support in programmable baseband processors
  Proceedings of IEEE PRIME 2006, Otranto, Italy, 2006.


Andreas Ehliar and Dake Liu
  Flexible Route Lookup Using Range Search
  The Third IASTED International Conference on Communications and Computer Networks,2005, 2005.


Anders Nilsson, Eric Tell and Dake Liu
  Acceleration in multi-standard baseband processors
  Radiovetenskap och Kommunikation,2005, 2005.


Eric Tell, Anders Nilsson and Dake Liu
  Implementation of a Programmable Baseband Processor
  Radiovetenskap och Kommunikation RVK,2005, 2005.


Eric Tell, Anders Nilsson and Dake Liu
  A Programmable DSP core for Baseband Processing
  IEEE Northeast Workshop on Circuits and Systems NEWCAS,2005, 2005.


Daniel Wiklund, Andreas Ehliar and Dake Liu
  Design of an internet core router using the SoCBUS network on chip
  International Symposium on Signals, Circuits, and Systems ISSCS,2005, 2005.


Daniel Wiklund and Dake Liu
  Design, mapping, and simulations of a 3G WCDMA/FDD basestation using network on chip
  International workshop on SoC for real-time applications,2005, 2005.


Eric Tell, Anders Nilsson and Dake Liu
  A Low Area and Low Power Programmable Baseband Processor Architecture
  International workshop on SoC for real-time applications,2005, 2005.


Andreas Ehliar, Daniel Wiklund and Dake Liu
  Feasibility study of a core router based on a network on chip
  Swedish System on Chip Conference SSoCC,2005, 2005.


Di Wu, Tiejun Hu and Dake Liu
  A Single Scalar DSP based Programmable H.264 Decoder
  Swedish System on Chip Conference SSoCC,2005, 2005.


Dake Liu, Eric Tell, Anders Nilsson and Ingemar Söderquist
  Fully flexible baseband DSP processors for future SDR/JTRS
  Western European Armaments Organization WEAO,2005, 2005.


Anders Nilsson, Eric Tell and Dake Liu
  A fully programmable Rake-receiver architecture for multi-standard baseband processors
  Proceedings of the Intl. conference on Networks and Communication systems, NCS2005, 2005.


Anders Nilsson, Eric Tell and Dake Liu
  A Programmable SIMD-based Multi-standard Rake Receiver Architecture
  European Signal Processing Conference, EUSIPCO, Antalya, Turkey, 2005.


Anders Nilsson, Eric Tell, Daniel Wiklund and Dake Liu
  Design methodology for memory-efficient multi-standard baseband processors
  Asia Pacific Communication Conference, Perth, Australia, 2005.


Mikael Olausson, Anders Edman and Dake Liu
  Bit memory instructions for a general CPU
  4th IEEE International Workshop on System-on-Chip for Real-Time Applications, 2004.Proceedings., 2004.


Dake Liu, Eric Tell and Anders Nilsson
  Implemenation of Programmable Baseband Processors
  CCIC,2004, 2004.


Daniel Wiklund, Sumant Sathe and Dake Liu
  Network on chip simulations for benchmarking
  International Workshop on SoC for real-time applications,2004, 2004.


Anders Nilsson and Dake Liu
  Processor friendly peak-to-average reduction in multi-carrier systems
  Swedish system-on-Chip Conference, SSoCC 04,2004, 2004.


Andreas Ehliar and Dake Liu
  Benchmarking network processors
  Swedish System-on-Chip Conference,2004, 2004.


Daniel Wiklund, Sumant Sathe and Dake Liu
  Benchmarking of On-Chip Interconnection Networks
  International Conference on Microelectronics, ICM,2004, 2004.


Dake Liu and Eric Tell
  A Hardware Architecture for a Multi Mode Block Interleaver
  International Conference on Circuits and Systems for Communications, ICCSC,2004, 2004.


Mikael Olausson, Andreas Ehliar, Johan Eilert and Dake Liu
  Reduced floating point for MPEG1/2 layer III decoding
  IEEE International Conference on Acoustics, Speech, and Signal Processing, 2004. Proceedings. (ICASSP '04)., 2004.


Anders Nilsson, Eric Tell and Dake Liu
  An accelerator structure for programmable multi-standard baseband processors
  Proceedings of the Intl. conference on Wireless networks and Emerging technologies, WNET2004, 2004.


Johan Eilert, Andreas Ehliar and Dake Liu
  Using low precision floating point numbers to reduce memory cost for MP3 decoding
  International Workshop on Multimedia Signal Processing, 2004.


Tomas Henriksson and Dake Liu
  Implementation of Fast CRC Calculation
  Asia South Pacific Design Automation Conference,2003, 2003.


Ulf Nordqvist and Dake Liu
  Packet Classification and Termination in a Protocol Processor
  Ninth International Symposium on High Performance Computer Architecture. Anaheim, California, February 8-12, 2003., 2003.


Eric Tell, Mikael Olausson and Dake Liu
  A General DSP processor at the cost of 23k gates and 1/2 a man-year design time
  International Conference on Acoustics, Speech and Signal Processing,2003, 2003.


Daniel Wiklund and Dake Liu
  SoCBUS: switched network on chip for hard real time embedded systems
  Proceedings. International Parallel and Distributed Processing Symposium, 2003, 2003.


Eric Tell, Olle Seger and Dake Liu
  A Converged Hardware Solution for FFT, DCT and Walsh Transform
  International Symposium on Signal Processing and its Applications,2003, 2003.


Eric Tell and Dake Liu
  A Suitable Channel Equalization Scheme for IEEE 802.11b
  Swedish System-on-Chip Conference,2003, 2003.


Ulf Nordqvist and Dake Liu
  Power optimized packet buffering in a protocol processor
  International conference on electronic circuits and systems, ICECS,2003, 2003.


Ulf Nordqvist and Dake Liu
  Control path in a protocol processor
  Midwest symposium on circuits and systems MWCAS,2003, 2003.


Tomas Henriksson, Daniel Wiklund and Dake Liu
  VLSI implementation of a switch for on-chip networks
  Int workshop on Design and diagnostics of electronic circuits and systems DDECS,2003, 2003.


Dake Liu and Mikael Olausson
  The ADSP-21535 Blackfin and speech coding
  Swedish System-on-Chip Conference SSoCC,2003, 2003.


Sumant Sathe, Daniel Wiklund and Dake Liu
  Design of a switching node (router) for on-chip networks
  Int Conference on ASIS ASICON,2003, 2003.


Ulf Nordqvist, Tomas Henriksson and Dake Liu
  Configurable CRC Generator
  Design and Diagnostics of Electronics, Circuits and Systems,2002, 2002.


Tomas Henriksson, Niclas Persson and Dake Liu
  VLSI Implementation of Internet Checksum Calculation for 10 gigabit Ethernet
  Design and Diagnostics of Electronics, Circuits and Systems,2002, 2002.


Daniel Wiklund and Dake Liu
  Design of a system-on-chip switched network and its design support
  IEEE 2002 International Conference on Communications, Circuits and Systems and West Sino Expositions, 2002.


Dake Liu, Ronny Nilsson and Fredrik Norling
  Full digital driving voice and audio load on an IC
  International Conference of Communications, Circuits and Systems,2002, 2002.


Tomas Henriksson, Ulf Nordqvist and Dake Liu
  Embedded Protocol Processor for Fast and Efficient Packet Reception
  International Conference on Computer Design,2002, 2002.


Dake Liu, Daniel Wiklund, Olle Seger, Sumant Sathe and Erik Svensson
  SoC BUS: The solution of high communication bandwidth on chip and short TTM
  Real Time and Embedded Computing Conference,2002, 2002.


Ulf Nordqvist and Dake Liu
  A Comparative Study of Protocol Processors
  Conference on Computer Science and Systems Engineering,2002, 2002.


Mikael Olausson and Dake Liu
  Instruction and hardware acceleration for MP-MLQ in G.723.1
  IEEE Workshop on Signal Processing Systems, 2002. (SIPS '02)., 2002.


Tomas Henriksson and Dake Liu
  Novel ASIP and Processor Architecture for Packet Decoding
  Workshop of Application Specific Processors Digest,2002, 2002.


Tomas Henriksson, Henrik Eriksson, Ulf Nordqvist, Per Larsson-Edefors and Dake Liu
  VLSI Implementation of CRC-32 for 10 Gigabit Ethernet
  The 8th IEEE International Conference on Electronics, Circuits and Systems, 2001: ICECS 2001, 2001.


Mikael Olausson and Dake Liu
  Instruction and Hardware Acceleration in G.723.1 (6.3/5.3) and G.729
  Proceedings of the 1st IEEE International Symposium on Signal Processing and Information Technology (ISSPIT), 2001.


Daniel Wiklund and Dake Liu
  Switched interconnect for system-on-a-chip design
  Proceedings of the IP2000 Europe Conference, 2000.


Ulf Nordqvist, Tomas Henriksson and Dake Liu
  CRC generation for protocol processing
  Proceedings of NORCHIP 2000, 2000.


Tomas Henriksson, Ulf Nordqvist and Dake Liu
  Specification of a configurable general-purpose protocol processor
  Proceedings of Second International Symposium on Communication Systems, Networks and Digital Signal Processing, 2000.


Tomas Henriksson, Ulf Nordqvist and Dake Liu
  Configurable Port Processor Increases Flexibility in the Protocol Processing Area
  Proceedings of COOLChips III An International Symposium on Low-Power and High-Speed Chips, 2000.


Dake Liu, Ulf Nordqvist and Christer Svensson
  Configuration-based architecture for high speed and general-purpose protocol processing
  1999 IEEE Workshop on Signal Processing Systems, 1999. SiPS 99., 1999.


Ph.D. Theses

Jian Wang
  Low Overhead Memory Subsystem Design for a Multicore Parallel DSP Processor
  2014.


  Fulltext PDF

Johan Eilert
  ASIP for Wireless Communication and Media
  2010.


Per Axel Karlström
  NoGAP: Novel Generator of Accelerators and Processors
  2010.


  Fulltext PDF

Rizwan Asghar
  Flexible Interleaving Sub–systems for FEC in Baseband Processors
  2010.


  Fulltext PDF

Di Wu
  Scalable Multi-Standard Radio Baseband for Modern Wireless Communications
  2009.


Andreas Ehliar
  Performance driven FPGA design with an ASIC perspective
  2009.


  Fulltext PDF

Anders Nilsson
  Design of programmable multi-standard baseband processors
  2007.


  Fulltext PDF

Eric Tell
  Design of Programmable Baseband Processors
  2005.


  Fulltext PDF